TSMC – Advancing Next Gen Semiconductor Technology

  • TSMC Japanese Centre, will conduct research & development in next gen three-dimensional silicon stacking.
  • Company is also working in the area of advanced packaging technologies in materials science
  • Cutting-edge 3D IC technology will enable the consolidation of hundreds of billions of transistors into a single pack, enabling the advancement of computing power
  • Global structural demand related to semiconductor is rising due to the megatrends of 5G and applications related to high performance computing

TSMC’s subsidiary, TSMC Japan 3DIC R&D Centre, has completed construction of its clean room in National Institute of Advanced Industrial Science and Technology (AIST) at Tsukuba Centre. One of the largest science cities in Japan, Tsukuba is renowned for housing numerous national research centres.

Newly established clean room facility at the TSMC Japanese Center, will conduct research & development in the next generations of three-dimensional silicon stacking. It will also work in the area of advanced packaging technologies in materials science. These technologies will enable system-level innovations for increasing computing performance and will support in integrating more functionality.

In March 2021, TSMC formed its Japanese subsidiary. At Tsukuba Center of AIST, TSMC started building a clean room facility. With the completion of the clean room, the TSMC Japan Centre will work with Japanese partners, domestic research organisations, and universities that have expertise in semiconductor materials and machinery to support research and development of cutting-edge 3D IC packaging materials.

The global structural demand related to semiconductor is rising due to the megatrends of 5G and applications related to high performance computing. Along with the reduction in transistor size, the next generation of three-dimensional silicon stacking, and sophisticated packaging technologies will pave the way for future advancements in semiconductor technology.

There are currently billions of transistors on a single die of semiconductor devices. Utilizing cutting-edge 3D IC technology will enable the consolidation of hundreds of billions of transistors into a single pack, enabling the advancement of computing power.

According to Dr. Marvin Liao, Vice President TSMC, “It’s exciting to think about all the innovations that will be possible with this level of computing power”.

Yutaka Emoto, Vice President and Center General Manager of the TSMC Japan 3DIC R&D Center  said  that Japan has many companies with functional materials and key technologies that are important in the global semiconductor supply chain. He emphasized that TSMC will continue to work on semiconductor process innovation through joint research and development with Japan.

TSMC is the world’s leading semiconductor foundry. Ever since its incorporation in 1987, TSMC has pioneered the pure-play foundry business model

It houses the world’s most cutting-edge semiconductor process technology, i.e. 5-nanometer production capabilities, TSMC is Headquartered in Hsinchu, Taiwan.

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